Embedded Microstrip Impedance Calculator converts trace width, thickness, substrate height, cover thickness, and dielectric constant into covered impedance, immersion factor, and delay.
Find the Characteristic Impedance of a Covered (Embedded) Microstrip PCB Trace
This calculator finds the characteristic impedance of a microstrip trace once solder mask, prepreg, or another dielectric layer covers it, along with the bare-surface impedance it’s being compared against, both effective dielectric constants, and the trace’s per-unit-length inductance and capacitance. PCB and RF engineers use it to correct impedance targets before layout, since covering a trace always pulls its impedance down from what the same bare geometry would measure.
Entering Trace Geometry, Cover Thickness, and Dielectric Constant
Enter trace width (W), trace thickness (T), substrate height (H1), and cover thickness (H2) in mm, plus the substrate’s dielectric constant (εr). You get back the embedded impedance (Z₀embed), the equivalent bare-surface impedance, both effective dielectric constants, immersion factor, propagation delay, velocity factor, and inductance/capacitance per meter.
How Embedded Impedance Is Calculated
Start with the bare microstrip. W/H1 picks the branch of Hammerstad’s closed-form equations — reproduced in Pozar’s Microwave Engineering — for the surface effective dielectric constant:
$$\varepsilon_{eff,surface} = \frac{\varepsilon_r+1}{2}+\frac{\varepsilon_r-1}{2}\sqrt{\frac{W}{W+12H_1}} \quad \text{for } W/H_1 \geq 1$$
Surface impedance follows from the same equations, using the thickness-corrected effective width instead of the raw trace width.
IPC-2141A Section 4.2.3 covers what happens next: burying the trace under a second dielectric pulls its effective permittivity up toward the substrate’s bulk εr, and how far depends on how thick the cover (H2) is relative to the substrate (H1). Once H2 catches up to H1, the trace is effectively fully buried and thicker cover stops mattering much. Impedance drops in step with that rising εeff, roughly as $1/\sqrt{\varepsilon_{eff}}$.
Feed it the wrong H2 and the answer is wrong in a way that still looks plausible — the usual error is entering the full remaining board thickness above the trace instead of just the dielectric layer actually touching it.
Why “IPC-2141A” Calculators Give Different Numbers
IPC-2141A’s embedded-microstrip equation shipped with an errata correction, and calculator vendors never converged on one reading of it — some apply the immersion correction using cover thickness alone, others use the gap between cover and substrate height. Two tools citing the same standard can land several percent apart on identical geometry. Treat this as a first-pass number, and confirm tight-tolerance targets with a field solver or a TDR test coupon.
Embedded Microstrip Cross-Section
Common Mistakes When Calculating Embedded Microstrip Impedance
- Entering H2 as the total board thickness left above the trace instead of just the cover layer touching it.
- Assuming more cover material keeps dropping impedance — the effect flattens out once H2 catches up to H1.
- Reusing a bare-trace impedance target after adding solder mask or prepreg without rerunning the numbers — covered traces run several ohms lower.
Typical Substrate Dielectric Constants
Datasheets usually list a process Dk and a design Dk — use the design value here.
| Substrate | εr (Design Value) | Source |
|---|---|---|
| FR-4 (general purpose) | 4.3–4.4 typical design value | Common manufacturer datasheets (~4.2–4.6 at 1 MHz) |
| Rogers RO4003C | 3.55 design (3.38 ± 0.05 process) | Rogers Corporation datasheet |
| Rogers RO4350B | 3.66 design (3.48 ± 0.05 process) | Rogers Corporation datasheet |
Common Questions About Embedded Microstrip Impedance
What’s the difference between surface and embedded impedance?
Surface impedance is for a bare trace in air. Embedded impedance is the same trace once a dielectric layer covers it — that layer pulls up the effective dielectric constant and pulls down the impedance.
What does the immersion factor represent?
The ratio of embedded to surface effective dielectric constant. Above 1 means the cover is pulling the trace’s field closer to the substrate’s bulk εr.
Does cover thickness matter as much as substrate height?
Only up to a point — once H2 catches up to H1 the correction is basically maxed out, so extra cover material barely moves the number.
Why include trace thickness (T) at all?
It widens the effective trace width used in the surface calculation. Skip it and you’ll overstate impedance slightly, on both the surface and embedded results.
Should I trust this for tight-tolerance impedance targets?
Use it to get in the right neighborhood. IPC-2141A’s own embedded-microstrip equation has a published errata, so verify tight tolerances with a field solver or a TDR measurement.