Pcb Impedance Calculator estimates microstrip and stripline impedance, signal delay, velocity, inductance, capacitance, and geometry limits for accurate, practical PCB design work.
Trace impedance on a PCB isn’t a guess. It falls out of a fixed relationship between copper geometry and the dielectric underneath it, described by the IPC-2141 simplified equations for microstrip and symmetric stripline.
Below is exactly how four inputs — dielectric constant, trace width, trace thickness, and height to the reference plane — turn into a single ohm figure, and which of those four actually moves the number.
The IPC-2141 Equations Behind Microstrip and Stripline
For a microstrip trace — copper on an outer layer, referenced to a single plane beneath it — the characteristic impedance is:
$$Z_0 = \frac{87}{\sqrt{\varepsilon_r + 1.41}} \ln\left(\frac{5.98h}{0.8w + t}\right)$$
For a symmetric stripline — copper buried between two reference planes, equal distance from each — the coefficient and dielectric term both change:
$$Z_0 = \frac{60}{\sqrt{\varepsilon_r}} \ln\left(\frac{1.9h}{0.8w + t}\right)$$
In both formulas, $\varepsilon_r$ is the substrate’s dielectric constant, $w$ is trace width, $t$ is copper thickness, and $h$ is height — but $h$ means something different depending on the layer.
For microstrip it’s the distance from the trace down to the one plane below it. For stripline it’s the full spacing between the two planes that sandwich the trace, not the gap to the nearer one alone. Feed a stripline calculation the distance to just one plane and the result comes out wrong by roughly a factor of two.
The tool also reports propagation delay, and it comes from a separate pair of IPC-2141 expressions rather than from $Z_0$ directly:
$$T_{pd,microstrip} = 84.72\sqrt{0.475\varepsilon_r + 0.67}\ \text{ps/in}, \qquad T_{pd,stripline} = 84.72\sqrt{\varepsilon_r}\ \text{ps/in}$$
Delay and impedance together produce the distributed inductance and capacitance per inch of trace: $L’ = (T_{pd} \times Z_0)/1000$ in nH/in, and $C’ = T_{pd}/Z_0$ in pF/in. That’s the transmission-line model a signal integrity engineer actually cares about — impedance is just the ratio of the two.
A 10-mil Microstrip Trace on Standard FR-4
Take a common outer-layer setup: $\varepsilon_r = 4.5$ (typical for FR-4 laminate), a 10 mil trace width, 1.4 mil copper (roughly 1 oz before etch), and 10 mil to the plane below. First check the geometry is inside the formula’s valid range — $w/h = 1.00$ and $t/h = 0.14$, both comfortably inside the 0.10–2.00 window IPC-2141 requires.
The width term comes first: $0.8(10) + 1.4 = 9.4$. Divide that into $5.98 \times 10 = 59.8$, giving a log argument of 6.36. The natural log of 6.36 is 1.85. The dielectric term is $\sqrt{4.5 + 1.41} = \sqrt{5.91} = 2.431$. Put it together:
$$Z_0 = \frac{87}{2.431} \times 1.85 = 66.22\ \Omega$$
The same inputs give a propagation delay of 141.95 ps/in, a signal velocity of 7.04 in/ns, round-trip delay of 283.91 ps/in, distributed inductance of 9.40 nH/in, and distributed capacitance of 2.14 pF/in.
The effective dielectric constant the signal actually sees — a blend of substrate and air above the trace — works out to 2.81, well below the substrate’s raw 4.5, which is why the velocity is faster than a fully-embedded trace of the same $\varepsilon_r$ would give.
Judging 66 Ω Against a Target, Not a Pass/Fail Line
The calculator doesn’t grade the ohm figure itself as right or wrong. It only enforces geometry limits so the approximation stays valid — width-to-height between 0.10 and 2.00, and for stripline, thickness-to-height at 0.25 or below. Push a design outside those numbers and it declines to return a result at all rather than hand back a wrong one.
Whether 66.22 Ω is acceptable depends entirely on what the net needs to be. Fifty ohms single-ended is the near-universal target for RF and high-speed digital traces; 90 Ω differential is standard for USB; 100 Ω differential shows up on most Ethernet and HDMI pairs.
Our example sits well above a 50 Ω single-ended target — to land near 50 Ω with the same 4.5 $\varepsilon_r$, 1.4 mil copper, and 10 mil height, width would need to open up to roughly 16.7 mil.
Width and Height Move the Number Far More Than Copper Thickness
Holding three inputs fixed and sweeping the fourth shows which variable actually does the work:
| Variable swept | Range tested | Resulting Z0 |
|---|---|---|
| Height to plane (h) | 6 to 20 mil | 47.94 Ω to 91.02 Ω |
| Trace width (w) | 8 to 20 mil | 72.89 Ω to 44.18 Ω |
| Dielectric constant (εr) | 3.0 to 5.0 | 76.66 Ω to 63.58 Ω |
| Copper thickness (t) | 0.7 to 2.8 mil | 68.99 Ω to 61.25 Ω |
Height swings the result more than any other input, because it sits inside the log argument directly rather than as part of a sum. Width is close behind. Thickness barely moves the needle — a four-fold increase from 0.7 to 2.8 mil shifts impedance less than 8 Ω, because $t$ only ever appears added onto $0.8w$, and $0.8w$ dominates that sum for any reasonably sized trace.
The single biggest jump in the whole model, though, isn’t a continuous variable at all. It’s which trace type you pick. The identical 10/1.4/10 mil geometry returns 66.22 Ω as microstrip but only 19.90 Ω as symmetric stripline — a difference bigger than any width, height, or dielectric sweep produces on its own.
That’s the combined effect of a lower coefficient (60 vs. 87), no fringing-field dielectric blend, and $h$ being read as full plane-to-plane spacing instead of distance to a single plane.
A few hard edges are worth knowing before they show up as an error message. Dielectric constant can’t go below 1.00 — vacuum is the physical floor. Width-to-height has to stay inside 0.10–2.00 for either trace type.
Stripline adds a second constraint: thickness-to-height can’t exceed 0.25, because once the copper gets thick relative to the plane spacing, the approximation stops holding.
And if a trace is crammed wide and thick into too little height, the log argument itself drops to 1 or below — the natural log goes to zero or negative, and the tool refuses to report a negative impedance rather than pretend the geometry works.
Common Questions About PCB Trace Impedance
What’s a good target impedance for a PCB trace?
It depends on the interface, not on some universal number. Fifty ohms single-ended is standard for RF and most general-purpose high-speed digital signals. Differential pairs are usually specified separately — 90 Ω for USB, 100 Ω for Ethernet and HDMI being the most common.
What’s the real difference between microstrip and stripline impedance?
Microstrip trace sits on an outer layer with one reference plane below it and air above, so part of the electric field passes through air instead of substrate — that’s why the formula blends in an effective dielectric constant lower than the raw laminate value. Stripline is buried symmetrically between two planes with no air gap, uses a lower coefficient, and reads its height input as the full plane-to-plane spacing rather than distance to one side.
Does copper thickness really change the impedance much?
Not much, compared to width or height. Quadrupling copper thickness from 0.7 to 2.8 mil, everything else held constant, moves impedance by less than 8 Ω in the IPC-2141 model. Width and height changes of similar proportion move it two to five times further.
How much does substrate dielectric constant affect the result?
Moderately, and the relationship is damped by a square root, so it never swings as hard as width or height do. Sweeping εr from 3.0 to 5.0 on an otherwise fixed microstrip geometry moves impedance from about 76.7 Ω down to 63.6 Ω.
Can I calculate PCB trace impedance in millimeters instead of mils?
Yes. Width, thickness, and height each convert independently between mil and mm at the standard 0.0254 mm-per-mil ratio, and switching a unit mid-entry converts whatever value is already in that field instead of clearing it.
Why does the calculator say “Geometry Outside IPC Range”?
Because the width-to-height ratio has fallen outside 0.10–2.00, the window the IPC-2141 simplified approximation is valid for. It’s not a soft warning — the tool won’t produce a number until the geometry is back inside that range.
Is characteristic impedance the same thing as trace resistance?
No. Characteristic impedance is an AC property of the trace acting as a transmission line, set by its distributed inductance and capacitance per inch — it exists whether or not current is flowing. DC resistance is a separate figure driven by copper cross-sectional area and resistivity, and it’s what causes voltage drop and heating along the trace, not signal reflections.
What the IPC-2141 Estimate Doesn’t Capture
These are simplified closed-form equations for a straight, isolated trace over a uniform dielectric. They don’t account for etch tolerance on the fabricated width, solder mask coating over the trace, copper surface roughness at high frequency, or coupling from a neighboring trace. A board with a real impedance-control spec still needs the fabricator’s own stack-up calculation or a 2D/3D field solver before it goes to production.